Chapter 1: Basic Blocks and Functions

Basic Blocks and Functions

介绍和概述

本节将概述Greenpaks最常见的构建块。每个宏小区类型将被赋予概述,并且可以包括用于使用该块的简单技术和应用程序。亚博国际官网平台网址有关特定单元格的更多信息可以在特定的GreenPak的数据表中找到,或GreenPak Designer软件中的帮助信息。

Technique: Learning More About a Macrocell

This technique will work with any version of GreenPAK Designer.

This section provides a brief overview and several techniques for the most common blocks in GreenPAKs. However, it may happen that you wish to learn more about a specific macrocell. This can be done by selecting the macrocell in the GreenPAK Designer, then clicking theInformationbutton (Figure 1) at the bottom-left of thePropertieswindow.

Figure 1 Info Button

Overview: Digital Macrocells

Digital Macrocells are the basic functional components of any GreenPAK. They include:

常见的数字宏小区:

  • Look-Up Tables (LUTs)
  • D Flip-Flop (DFF) / Latch
  • Counter / Delay (CNT/DLY)

Communication:

  • I2C (many devices)
  • SPI(选择设备)

Less Common:

  • Pattern Generator (PGEN)
  • Pipe Delay
  • Programmable delay (PDLY)
  • Filter / Edge Detector

GreenPak设计器中的许多组件都可以选择为多种类型的宏小区之一。这由数字宏小区的名称表示:例如,“2-bit LUT0/DFF/LATCH0” can be, as the name implies, a LUT, DFF, or a Latch. The selection of macrocell type is configured using the类型option in thePropertieswindow.

图2数字宏小区

Technique: Configuring Standard Logic w/ LUT Macrocells

This technique will work with any GreenPAK.

查找表可用于GreenPak Designer,为两个,三个或四个输入,单个输出逻辑宏小区配置任何数字逻辑。可以在中编辑逻辑配置Propertieswindow.

Most logic implemented in GreenPAK designs is standardized logic, such as MUX, AND, OR, etc… To expedite these common configurations, thePropertieswindow has aStandard gatesoption that can automatically convert the logic table into a standard gate configuration. If theRegular shapeoption is left unchecked the LUT shape will change to the standardized gate symbol.

Figure 3 Config for 3-bit LUT0

Overview: Oscillators

GreenPAKICs contain at least two oscillators; the more recent models, such as the SLG46826, have three oscillators. The most common, non-divided frequencies of the oscillators within GreenPAK are:

  • 2KHz low speed, low power oscillator
  • 2MHz medium speed
  • 25MHz high speed

Each oscillator has several outputs, each with several pre-dividers to allow flexibility in clocking. To save powerAuto-power onallows you to turn off the oscillator when the clock is not needed.

More information about oscillators can be found by using the Information button when the component is selected.

Figure 4 Oscillators

Overview: Analog Comparators

Almost every GreenPAK is equipped with two or more analog comparators [ACMPs], each with two input sources;在+and在-. The input source to each can be configured in thePropertieswindow.

More information about analog comparators can be found by using the Information button when the component is selected.

Figure 5 ACMPs

Overview: I/Os

Most I/Os within GreenPAK are very flexible. The I/O capabilities vary significantly from pin to pin and part to part, so a design concept should be mapped to the necessary pin configuration before committing to a specific GreenPAK IC.

Outputs can be configured to be Push-pull or open-drain in either a NMOS or PMOS configuration. A scaling factor, such as 2x, indicates that the output strength is doubled. Additionally, pull-up and pull-down resistor options of 10kΩ, 100kΩ, and 1MΩ are available on output pins.

Multiple input options are available as well, such as: Digital-In, Digital-In with Schmitt trigger, Low Voltage Digital-In and Analog-In. Analog in is used as an input to an ACMP.

Figure 7 Typical I/O Structure

Overview: Interconnections

Interconnection with GreenPAK Designer is easy. The system will guide you on which connections you can make. When you click on any connection point, the system:

  • Highlights all available connections in green
  • Gives you a “rubber band” connection that you can stretch to any of these green connection
  • This results in a green wire to show you interconnections you have made

图8互连

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