GreenPAK™ with Asynchronous State Machine (ASM)

GreenPAK™ with Asynchronous State Machine (ASM)

GreenPAK Designer software for Windows, macOS or Linux

GreenPAK™ family devices that include the Asynchronous State Machine (ASM) macro-cell allow the user to develop their own custom state machine designs. The user has the option to set the definition of the states, the definition of allowed state transitions, and the definition of the signals that will trigger each state transition. This macro-cell can also be flexibly connected to I/O pins and other GPAK resources for state transition inputs, and outputs from the macro-cell can be routed to other resources or I/O pins. Two important performance parameters for this macro-cell are transition times of less than 1 µS from state to state, and a standby current of less than 1µA when not in active state transition.

This ASM macro-cell is supported in a new ASM Editor window in GPAK Designer SW. Shown here is the view inside the ASM editor. This editor supports the flexibility to:

  • Check boxes to select states in project, up to the allowable maximum number of states based on silicon architecture
  • Edit state names to match application
  • Easy “point and click” actions to add state transitions
  • Arrange state diagram for best comprehension
  • Set value of output signals in Output RAM Array

Inside the main GPAK Designer GUI, the ASM macro-cell shows up with inputs that drive state transitions, and outputs that can be routed to other internal resources, or out to pins. Inside each state, the allowed “next states” show up here, with an input that when asserted will cause that state transition to happen. The connection between resources used to make state transitions, and the state transition links is also shown back in the original ASM Editor window with labels on each of the state transition signals showing the source of the signal.

As this macro-cell does not require a clock input, it will consume less than 1 µA when not in active state transition. This gives the designer tremendous flexibility to create low power designs in minutes. This is especially valuable when designing event driven systems that are waiting long periods of time with little activity, as the ASM macro-cell can remain in a low power state waiting for input, and and react in less than a µS to change state.

PN Special Feature GPIO Nominal VDD
(V)
ACMP DCMP/PWM Max. CNT/DLY Max. LUTs Max. DFF Pipe
Delay
课题。海底 OSC Com. Interface Package Size (mm) Socket Documents
SLG46127
SLG46127MTR
2x P-FET 6 1.8 - 5.0 2 - 4 10 4 8-stage 1 RC OSC - 1.6 x 2.0 mm MSTQFN-16 (#1) Documentation
SLG46580 ASMLDO 9 2.5 - 5.0 4 - 5 16 9 16-stage 1 Conf. OSCLP OSC I²C 2.0 x 3.0 mm STQFN-20 (#3) Documentation
SLG46582 ASMLDO 9 2.5 - 5.0 4 - 5 16 9 16-stage 1 Conf. OSCLP OSC I²C 2.0 x 3.0 mm STQFN-20 (#3) Documentation
SLG46583 ASMLDO 9 2.5 - 5.0 4 - 5 16 9 16-stage 1 Conf. OSCLP OSC I²C 2.0 x 3.0 mm STQFN-20 (#3) Documentation
SLG46585 ASMLDODCDC 9 2.5 - 5.0 4 - 5 16 9 16-stage 1 Conf. OSCLP OSC I²C 3.0 x 3.0 mm MSTQFN-29 (#1) Documentation
SLG46533
SLG46533MTR
- 18 1.8 - 5.0 4 - 7 25 15 16-stage 1 Conf. OSCRing OSCCrystal OSC I²C 2.0 x 2.2 mm
2.0 x 3.0 mm
MSTQFN-22 (#1)STQFN-20 (#1) Documentation
SLG46538 ASMDual Supply 17 1.8 - 5.01.8 - VDD1 4 - 7 17 8 16-stage 1 Conf. OSCRC OSCCrystal OSC I²C 2.0 x 3.0 mm
2.0 x 2.2 mm
STQFN-20 (#2)MSTQFN-22 (#2) Documentation
SLG46538-A ASMDual Supply 17 1.8 - 5.01.8 - VDD1 4 - 7 17 8 16-stage 1 Conf. OSCRC OSCCrystal OSC I²C 2.0 x 3.0 mm
2.0 x 2.2 mm
STQFN-20 (#2)MSTQFN-22 (#2) Documentation
SLG46537 ASM 18 1.8 - 5.0 4 - 7 17 8 16-stage 1 Conf. OSCRC OSCCrystal OSC I²C 2.0 x 3.0 mm
2.0 x 2.2 mm
STQFN-20 (#1)MSTQFN-22 (#1) Documentation
SLG46536 - 12 1.8 - 5.0 3 - 7 25 15 16-stage 1 Conf. OSCRing OSCCrystal OSC I²C 2.0 x 2.2 mm STQFN-14 (#2) Documentation
SLG46535 ASMDual Supply 11 1.8 - 5.01.8 - VDD1 3 - 7 17 8 16-stage 1 Conf. OSCRing OSCCrystal OSC I²C 2.0 x 2.2 mm STQFN-14 (#3) Documentation
SLG46534 ASM 12 1.8 - 5.0 3 - 7 17 8 16-stage 1 Conf. OSCRC OSCCrystal OSC I²C 2.0 x 2.2 mm STQFN-14 (#2) Documentation
SLG46170 - 12 1.8 - 5.0 - - 8 17 6 16-stage 1 RC OSC - 2.0 x 2.2 mm STQFN-14 (#2) Documentation
SLG46169 - 12 1.8 - 5.0 2 - 7 18 6 16-stage 1 RC OSC - 2.0 x 2.2 mm STQFN-14 (#2) Documentation
SLG46108 - 6 1.8 - 5.0 - - 4 10 4 8-stage 1 RC OSC - 1.0 x 1.2 mm STQFN-8 (#1) Documentation
SLG46121 Dual Supply 9 1.8 - 5.01.8 - VDD1 2 - 4 16 8 8-stage 1 RC OSC - 1.6 x 1.6 mm STQFN-12 (#2) Documentation
SLG46621 Dual Supply8-bit ADC 17 1.8 - 5.01.8 - VDD1 6 3/3 10 26 12 16-stage 2 2 LF OSCRing OSCRC OSC SPI 2.0 x 3.0 mm STQFN-20 (#2) Documentation
SLG46620 8-bit ADC 18 1.8 - 5.0 6 3/3 10 26 12 16-stage 2 2 LF OSCRing OSCRC OSC SPI 2.0 x 3.0 mm
6.5 x 6.4 mm
STQFN-20 (#1)TSSOP-20 (#1) Documentation
SLG46620-A 8-bit ADC 18 1.8 - 3.3 6 3/3 10 26 12 16-stage 2 2 LF OSCRing OSCRC OSC SPI 6.5 x 6.4 mm TSSOP-20 (#1) Documentation
SLG46117 1x P-FET 7 1.8 - 5.0 2 - 4 10 4 8-stage 1 RC OSC - 1.6 x 2.5 mm STQFN-14 (#1) Documentation
SLG46116 1x P-FET 7 1.8 - 5.0 2 - 4 10 4 8-stage 1 RC OSC - 1.6 x 2.5 mm STQFN-14 (#1) Documentation
SLG46140 8-bit ADC 12 1.8 - 5.0 2 3/3 4 16 6 16-stage 1 LF OSCRing OSCRC OSC SPI 1.6 x 2.0 mm STQFN-14 (#1) Documentation
SLG46120 - 10 1.8 - 5.0 2 - 4 16 8 8-stage 1 RC OSC - 1.6 x 1.6 mm STQFN-12 (#1) Documentation
SLG46110 - 8 1.8 - 5.0 2 - 4 10 4 8-stage 1 RC OSC - 1.6 x 1.6 mm STQFN-12 (#1) Documentation
SLG46722 - 18 1.8 - 5.0 - - 8 17 6 16-stage 1 RC OSC - 2.0 x 3.0 mm STQFN-20 (#1) Documentation
SLG46721 - 18 1.8 - 5.0 4 - 7 18 6 16-stage 1 RC OSC - 2.0 x 3.0 mm STQFN-20 (#1) Documentation
SLG46824 In-System ProgrammabilityDual Supply 17 2.5 - 5.01.8 - VDD1 2 - 8 19 17 16-stage 1 RC OSCLP OSCRing OSC I²C 2.0 x 3.0 mm
6.5 x 6.4 mm
STQFN-20 (#4)TSSOP-20 (#2) Documentation
SLG46826 In-System ProgrammabilityDual Supply 17 2.5 - 5.01.8 - VDD1 4 - 8 19 17 16-stage 1 RC OSCLP OSCRing OSC I²C 2.0 x 3.0 mm
6.5 x 6.4 mm
STQFN-20 (#4)TSSOP-20 (#2) Documentation
SLG46827-A In-System DebugDual Supply 17 2.5 - 5.01.8 - VDD1 4 - 8 19 17 16-stage 1 RC OSCLP OSCRing OSC I²C 2.0 x 3.0 mm
6.5 x 6.4 mm
STQFN-20 (#4)TSSOP-20 (#2) Documentation
SLG46880 ASMDual Supply 28 2.5 - 5.02.5 - VDD1 4 - 5 12 5 16-stage 1 RC OSCLP OSCRing OSCCrystal OSC I²C 4.0 x 4.0 mm STQFN-32 (#1) Documentation
SLG46881 ASMDual Supply 28 2.5 - 5.01.0 - 1.8 4 - 5 12 5 16-stage 1 RC OSCLP OSCRing OSCCrystal OSC I²C 4.0 x 4.0 mm STQFN-32 (#1) Documentation
SLG46517 ASM2x P-FET 16 1.8 - 5.0 4 - 7 17 8 16-stage 1 RC OSCRing OSCCrystal OSC I²C 2.0 x 3.0 mm MSTQFN-28 (#1) Documentation
SLG46855 - 12 2.5 - 5.0 4 - 8 23 21 16-stage 1 RC OSCLP OSCRing OSC I²C 1.6 x 2.0 mm STQFN-14 (#1) Documentation
SLG46855-A - 12 2.5 - 5.0 4 - 8 23 21 16-stage 1 RC OSCLP OSCRing OSC I²C 1.6 x 2.0 mm STQFN-14 (#1) Documentation
SLG46867 2x P-FET 10 2.5 - 5.0 4 - 8 23 21 16-stage 1 RC OSCLP OSCRing OSC I²C 1.6 x 3.0 mm MSTQFN-20 (#1) Documentation
APP亚博娱乐 Dual Supply4 Half- / 2 Full- bridgesI/V Regulation 84 x HV 2.5 - 5.03.3 - 12.0 2 0/2 5 17 15 16-stage 1 LP OSCRing OSC I²C 2.0 x 3.0 mm STQFN-20 (#5) Documentation
SLG47004 Op AmpDigital RheostatAnalog SwitchAuto TrimIn-System Programmability 8 2.5 - 5.0 3 0/0 7 20 18 16-stage 1 RC OSCLP OSCRing OSC I²C 3.0 x 3.0 mm STQFN-24 (#1) Documentation
SLG88103 Op Amp 0 1.8 - 5.0 0 0/0 0 0 0 - 0 - - 2.0 x 2.0 mm - Documentation
SLG88104 Op Amp 0 1.8 - 5.0 0 0/0 0 0 0 - 0 - - 2.0 x 3.5毫米 - Documentation

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