SLG46722

18-GPIO, 17 LUTs (max.), 8 CNT/DLY (max.), 6 DFF/LATCH (max.) and other Macrocells

The SLG46722 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macro cells of the SLG46722. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit.

Fifteen Combinatorial Look Up Tables (LUTs):

• 五个2位LUT;
• Nine 3-bit LUTs;
• One 4-bit LUT;

Two Combination Function Macro cell:

• One Selectable DFF/Latch or 2-bit LUT;
• One Selectable Pipe Delay or 3-bit LUT:
  • 管道延迟 - 16级/ 3输出;

八个计数器/延迟发电机(CNT /海底):

• Two 14-bit delay/counter;
• 一个14位延迟/计数器，外部时钟/复位;
• 三个8位延迟/计数器;
• 具有外部时钟/复位的两个8位延迟/计数器;

六d触发器/闩锁（DFF）;

Pipe Delay - 16 stage/3 output (Part of Combination Function Macrocell);

Programmable Delay;

Additional Logic Functions - 2 Deglitch Filters;

RC Oscillator (RC OSC).

Logic & Mixed Signal Circuits

高度通用的宏小区

Read Back Protection (Read Lock)

1.8V (±5%) to 5V (±10%) Supply

Operating Temperature Range: -40°C to 85°C

RoHS Compliant / Halogen-Free

个人电脑和服务器

PC外围设备

消费类电子产品

Data Communications Equipment

Handheld and Portable Electronics

SLG46722V: STQFN-20 (2.0 x 3.0 x 0.55 mm, 0.4 mm pitch)

The product ID suffix indicates the package style.