4 AFE Without Internal Voltage Reference Source

4.1 Hardware Setup of AFE Without Internal Voltage Reference

Figure 1 shows a schematic of the analog front end for MCU with ADC, which has an external analog reference option. Sensor, ADC reference, DAC (Rdiv1, RH0, Rdiv2 divider for offset compensation), and Chopper ACMP reference are powered from one voltage source: Van. Characteristics of the components can be found in Table 1. A pressure sensor from Honeywell (NSCSDRN060MD) is used in this example.

图1:惠斯登电桥的模拟前端Sensor

In Figure 1 V_anis the supply voltage for analog components. V_anis filtered V_DDvoltage. The output of the sensor with no pressure is equal to (V_an/2 ± V_{os_bridge}), where V_{os_bridge}is the bridge offset voltage. Since the force to the sensor can be applied in both directions, the output of the sensor can be higher or lower than zero point (V_an/2 ± V_{os_bridge}). So the AFE must amplify the output signal differentially between the sensor zero point and its actual output.

The optional C_fcapacitance is needed to cancel the switching noise of digital rheostats. The value of C_fcan be changed.

The output voltage of AFE is:

where

Rf– are user-defined resistors,Rf= 200 KΩ and 0.5% tolerance in the current project;

Rg– is user-defined gain resistor;

V_ref- is the reference voltage for the instrumentation amplifier.

4.2 Precision Characteristics of Components

Precision characteristics of the components are shown in Table 1.

Table 1: Precisive Characteristics of Components

Parameter	Description	Value	Unit
Sensor Characteristics
ΔP	Pressure Range	±6.0	kPa
KVout	Full Scale Span Coefficient	±2.46 (min), ±2.60 (typ), ±2.8 (max)	mV/V
Kos_out	Null Offset Coefficient	±0.075	mV/V
Sensor Characteristics at 3.3 V DC
ΔVout	Output Voltage Span	±8.1 (min), ±8.58 (typ), ±9.2 (max)	mV
Vos_bridge	Null Offset	±0.248 (max)	mV
dVos_bridge/dT	Offset Temperature Drift (T = 0 to 50 °C)	±0.6 (max)	%FSS
OpAmps Characteristics
VosOpAmp	Input Offset Voltage	1.0 (max)	mV
dVosOpAmp/dT	Offset Drift with Temperature	5 (max)	µV/°C
ΔRint	Mismatch Between Internal R1, R2, R3, R4 Resistors	0.05	%
Digital Rheostats Characteristics
RH1, RH2	Digital Rheostats Resistance	80 (min), 100 (typ), 120 (max)	kOhm
Ntaps	Number of Taps	1024
fChACMP	Chopper Comparator Switching Frequency	10	kHz
VCh_offset	Chopper Comparator Offset when Set is Active	300 (max)	µV
DNL	Differential Non-Linearity (max)	1	LSB
αR(T)	Nominal Resistance Temp Coefficient	100	ppm/°C
HD Buffer Characteristics
Vos_HD_Buf	HD Buffer Offset	±3 (max), T = 25 °C	mV
ΔVOUT(I)	HD Buffer Load Regulation at ILoad= 2mA	2	mV
External Resistors Characteristics
ΔRext	Resistors Tolerance	0.5 and 1	%
αRext(T)	Resistance Temp Coefficient	50	ppm/°C

4.3 Internal GreenPAK Design and Macrocells Configurations

4.3.1 Internal Design of the Project

Figure 2 shows the internal design of the project in GreenPAK Designer Software.

Figure 2: Internal Design of the Project

4.3.2 OpAmps Configurations

OpAmps configurations are shown in Figure 3.

Figure 3: OpAmps Configurations

4.3.3 Chopper ACMP Configuration

Channel0 of Chopper ACMP is used for offset correction. Channel1 of Chopper ACMP is used for tuning gain of AFE. Chopper ACMP configuration is shown in Figure 4.

Figure 4: Chopper ACMP Configuration

4.3.4 Digital Rheostats Configurations

Digital Rheostats configurations are shown in Figure 5.

Figure 5: Digital Rheostats Configurations

4.3.5 LUT Configuration

LUT configuration is shown in Figure 6.

Figure 6: LUT Configuration

4.3.6 Temperature Sensor Configuration

The temperature sensor configuration is shown in Figure 7.

Figure 7: Temperature Sensor Configuration

4.3.7 Oscillator0 and I²C Macrocells Configurations

Oscillator0 and I²C Macrocells use default configurations.

4.3.8 GPIOs Configurations

GPIOs configurations are shown in Figure 8.

Figure 8: GPIOs Configurations

4.4 Gain Resistor Calculation

To calculate the value of the gain resistor Rg the minimum and maximum gain of the instrumentation amplifier must be assessed. Considering the possible output span of the sensor V_an·KV_out(from 8.12 mV to 9.24 mV for V_an= 3.3 V), the gain of AFE can be found from the equation:

whereGain_ref_ChopACMP– is the reference voltage of ChopperACMP for gain tuning (see Channel1 In- reference source of Chopper ACMP, Section 4.3.3).Gain_ref_ChopACMP= V_DDA*(3/64) or 0.155 V for V_an= 3.3 V.

For the schematic shown in Figure 1 V_DDA= V_an. So, the equation (2) can be rewritten as

or

From equation (3) it’s seen that variations in V_anvoltage don’t affect the gain of system:

现在可以建立graph for the function Gain = f(n), where n – is the code of the rheostat from 1 to 1024:

Note that the chip to chip variation of RH maximum resistance is from 80 kΩ to 120 kΩ. The 80 kΩ value should be used for gain resistor calculation.

By varying the value of R_git’s possible to match the span of AFE gain from Gain_min to Gain_max, see Figure 9. If there is no R_gvalue to match the desired range, then R_fvalue should be increased. For the current schematic R_f= 200 kΩ and R_g= 2.61 kΩ.

Figure 9: Gain of AFE as a Function of Digital Rheostat's Code, Rgain = f(n)

4.5 Vref Divider Resistors Calculation

To calculate the values of DAC resistors (Rdiv1, RH0, Rdiv2 divider) the maximum range of Vref (V_compvalue) should be calculated. Considering the biggest possible gain of the AFE (Gain_max = 184.2) and the biggest possible input offset (see Figure 10):

the Vref can be changed by the value of V_comp:

To find the value of Rdiv1, Rdiv2, the next equation system should be solved:

whereRH0_max– maximum resistance of the rheostat, in the worst caseRH0_max= 80 kΩ;

V_an– is the voltage applied to the divider.

对当前最近的标准val示意图ues of resistors areR_div2= 75 kΩ,R_div1= 46.4 kΩ.

4.6 Offset Error Sources and Offset Compensation

To set zero point for the AFE (zero pressure) the voltage from divider (Rdiv1, RH0, Rdiv2) is used. The output from the divider must be connected to the instrumentation amplifier through the buffer to eliminate the impact of DAC output resistance.

By changing the value of RH0 not only sensor offset, but OpAmps input offset voltages can be compensated. See the equation below.

Let’s add offset voltages to the equation (1):

whereV_osOpAmp0,V_osOpAmp1,V_{os_IntOpAmp}– are input offset voltages of the SLG47004 amplifiers;

V_{os_Input_Buffer}– is buffer input offset voltage;

V_osbridge– is offset voltage of the sensor;

Vcm_error– is common-mode voltage error caused by inequality of internal R1, R2, R3, R4 resistors, and external R_fresistors. This voltage will be compensated after the trim procedure.

V_comp– is the shift voltage from the divider for offset voltages compensation.

Note that signs of offset voltages were selected to show the worst-case error, see Figure 10.

Figure 10: AFE with Offset Sources Placed to Show the Worst Case

4.7 Tuning Gain of AFE

Since the sensors span can be in the range from ±8.1 mV to ±9.2 mV for V_an= 3.3 V, the gain of the instrumentation amplifier must be tuned to cover the full output range of the AFE.

The linear output swing of the SLG47004 OpAmps is from GND + 100 mV to V_DD- 100 mV. It’s proposed to use the output range from V_DDA*(32/64) to (V_DDA- V_DDA*(3/64)) for positive sensor output and from V_DDA*(32/64) to V_DDA*(3/64) for negative sensor output. V_DDA*(3/64) is the threshold for internal Chopper ACMP, which is used for gain tuning. V_DDA*(3/64) = 0.155 V for V_DDA= 3.3 V.

4.8 Algorithm for Tuning Gain and Compensating Offset of the System

The initial value of RH0 and RH1 are 100 KΩ (80 KΩ in the worst case), code = 1024.

• 1st step: offset compensation. Load the sensor with zero load (no load). Send to the SLG47004 I²C command to set the V_irtInput0 (pulse to Set0 input of PT0 block) to logic High level. This will start the Auto-Trim procedure for RH0. Then I²C master should clear the V_irtInput0 of the SLG47004, which is connected to Set0 input. During the Auto-Trim procedure the SLG47004 changes the value of RH0 until the output voltage of AFE reaches V_DDA/2. After the end of the Auto‑Trim procedure (logic level of Idle/nActive output of PT block becomes High) the system is ready for the next step.
• 2nd step: gain tuning. Load the sensor with a defined load. Send to the SLG47004 I²C command to set V_irtInput1 (pulse to Set1 input of PT block) to logic High level. This will start the Auto-Trim procedure for RH1. Then I²C should clear the V_irtInput1 of the SLG47004, which is connected to Set1 input. During this Auto-Trim procedure the SLG47004 changes the value of RH1 until the output voltage of AFE reaches (V_DDA*(3/64)). After the end of the Auto-Trim procedure (logic level of Idle/Active output of PT block becomes High) the system is ready for the next step.
• 3rd step: offset compensation. This step is the same as the 1st step.

Optionally, if higher accuracy is required, the User can add more offset/gain calibration steps considering the following limitations:

• The Auto-Trim procedures of total offset compensation and system gain error must be done iteratively starting and finishing with the total offset compensation.
• Total system offset (sensor offset + OpAmp1 offset + OpAmp2 offset) must not be greater than V_{sensor_output_range}/2.

Expected Gain errors after each tuning iteration are shown in Table 2.

Table 2: Expected Gain of AFE during Auto-Trim Procedure

	Gain	Gain Error, %
Etalon gain	174.2	-
1st iteration (offset trim, then gain tuning)	170.9	1.89%
2nd iteration (offset trim, then gain tuning)	173.4	0.49%
3rd iteration (offset trim, then gain tuning)	174.4	0.09%

After the 3rd iteration the gain error is associated with the step error of digital rheostat.

4.9 Offset Compensation Accuracy

Assume that the Auto-Trim is done at temperature = 25 °C. The gain of the instrumentation amplifier is 273.3, RH resistance is 100 kΩ for code = 1024. Table 3 shows the accuracy of setting zero point (offset compensation).

Table 3: Accuracy of Setting Zero Point

Parameter	Value, V	Error in % of output sensor range
Step near set point (Vout[NRH0] – Vout[NRH0-1]) (Note 1)	0.0006	0.04 %
Step near set point considering rheostat DNL (Note 2)	0.0012	0.08 %
Step error considering DNL and ACMP offset (Note 3)	0.0015	0.1 %

Note 1The minimum achievable error of the Auto-Trim system is one trim step (± 1 of digital rheostat code, see Figure 11).

Note 2Multiply ‘Step near set point’ value (V_out[N_DR]- V_out[N_DR-1]) by 2 (DNL error).

Note 3Add the typical Chopper ACMP offset of 300 µV to the previous value.

Figure 11: Error Sources of Offset Compensation Process

In the case of 10-bit ADC, the maximum error of the trimmed system is:

Please note that this error value is independent of V_anvoltage.