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带异步状态机(ASM)的GreenPak™

使用greenpak的妇女

格林帕克™ family devices that include the Asynchronous State Machine (ASM) macro-cell allow the user to develop their own custom state machine designs. The user has the option to set the definition of the states, the definition of allowed state transitions, and the definition of the signals that will trigger each state transition. This macro-cell can also be flexibly connected to I/O pins and other GPAK resources for state transition inputs, and outputs from the macro-cell can be routed to other resources or I/O pins. Two important performance parameters for this macro-cell are transition times of less than 1 µS from state to state, and a standby current of less than 1µA when not in active state transition.

GPAK Designer SW中的新ASM编辑器窗口支持此ASM宏单元。这里显示的是ASM编辑器中的视图。此编辑器支持以下灵活性:

  • 复选框以选择项目中的状态,基于硅架构的允许最大状态
  • 编辑状态名称以匹配应用程序
  • 轻松“点并单击”操作以添加状态转换
  • 安排最佳理解的状态图
  • 在输出RAM阵列中设置输出信号的值

Inside the main GPAK Designer GUI, the ASM macro-cell shows up with inputs that drive state transitions, and outputs that can be routed to other internal resources, or out to pins. Inside each state, the allowed “next states” show up here, with an input that when asserted will cause that state transition to happen. The connection between resources used to make state transitions, and the state transition links is also shown back in the original ASM Editor window with labels on each of the state transition signals showing the source of the signal.

由于此宏小区不需要时钟输入,因此在不存在活动状态转换时将消耗小于1μA。这使设计人员在几分钟内创建低功耗设计的巨大灵活性。当设计等待时间长时间的事件驱动系统时,这尤其有价值,随着ASM宏小区可以保留在等待输入的低功率状态,并且在小于μs以更改状态的情况下反应。

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PN 特色 GPIO公司 Nominal VDD
(V)
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SLG46621 Dual Supply8.-bit ADC 17. 1.8 - 5.01.8 - VDD1. 6. 3/3 10. 26. 12 16.-stage 2 2 lf osc.Ring OSCRC OSC公司 SPI 2.0 x 3.0 mm STQFN-20(#2) Documentation
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SLG46140 8.-bit ADC 12 1.8 - 5.0 2 3/3 4. 16. 6. 16.-stage 1 lf osc.Ring OSCRC OSC公司 SPI 1.6 x 2.0 mm STQFN-14(#1) Documentation
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2.0 x 2.0毫米
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SLG46721 - 18. 1.8 - 5.0 4. - 7. 18. 6. 16.-stage 1 RC OSC公司 - 2.0 x 3.0 mm STQFN-20(#1) Documentation
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SLG46826 In-System ProgrammabilityDual Supply 17. 2.5 - 5.01.8 - VDD1. 4. - 8. 19. 17. 16.-stage 1 RC OSC公司LP OSC.Ring OSC 我²C 2.0 x 3.0 mm
6..5 x 6.4 mm
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格林帕克Designer
名称 日期 版本
格林帕克Designer software for Windows, macOS or Linux(7.58 KB)
Brochures
名称 日期 版本
GreenPak™手册(3.4 MB) 01/01/2020 1.0

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1个月前

SLG46517M PFET电源开关

Posted byYuseungho20.points 3.replies
0.upvotes

Dear,

I'm using the device SLG46517M which has two P-FET power switches. Now, I'm testing the device in emulation mode.

Here I attach my simplified design of the circuit.

问题是,当开关关闭时,Vout节点具有太大的尖峰,尖峰排出得非常缓慢。

结果,当它关闭时,它几乎达到输入电压的两倍(具有500mV输入的〜920mV)。负载侧现在仅具有固定电阻,该电阻是2MOHM用于测试。

(我也附上波形)

When the switch is on, it outputs properly with the input voltage of 500mV.

As you can see, FSM(ASM) turns on OSC0 in GPAK when the condition is met, and the OSC0 triggers the PFET with 25kHz switching frequency.

I could not figure out what the problem is. I'd really appreciate if you could share your opinions.

谢谢你。

Regards,

Seungho Yu.

附件 尺寸
simple circuit architecture 111.7千字节
示波器波形 223.86 KB.

1个月前

ssaravan

嗨Seungho Yu,

Thank you for reaching out. Could you please share your GPAK design file (.gp) so I can look into the problem?

此致

Shivani

1个月前

Yuseungho 20.points

Thank you for your answer.

请你告诉我你的电子邮件吗?

Because the design file might be personal, I'd like to send you by email.

Thanks.

1个月前

Yuseungho 20.points

我认为电压放电缓慢的原因是负载电阻的电阻过大,这导致RC时间常数太高。

I changed the load resistor from 2Mega ohm to 100 ohm, and find it shows reasonable waveform.

But I have another problem now.

根据SLG46517M的数据表,PFET的最小输入电压为300mV。

But I found that to toggle the PFET on/off, input should be larger than about 700mV(experiment result).

当输入电压大于300mV,小于一定值时,PFET不能正常输出(与输入电压不同,约50mV,几乎没有信号)。

The design has not changed, it's same as before.

请告诉我你的电子邮件,然后我会发给你我的设计文件。

I look forward to hearing from you.

谢谢你。